In digital equipment using a semiconductor device such as a terminal apparatus in a movable communications system (portable telephone), it is usually important how highly the semiconductor is integrated in order to achieve smaller size and lighter weight of that equipment. With the miniaturization of semiconductor circuits progressing smoothly up to present, the merits of combining as many circuits as possible in a single chip, reducing packaging area, increasing speed, and reducing power consumption have been put to practical use. However, with the miniaturization of semiconductor circuits, the problems of a sudden rise in manufacturing costs and lengthening of the time for design and development came to light.
Accordingly, attention is being paid to SIP (System in Package) technology in which a plurality of semiconductor chips are implemented in three dimensions. As shown for example in FIG. 9, a semiconductor chip 30 is mounted on a package substrate 10, another semiconductor chip 40 is further mounted on this semiconductor chip 30, and wire bonding is executed with wire W between these semiconductor chips 30 and 40 and the package substrate 10. This technology is introduced in Nikkei Electronics 2002, 2-11 no. 815, p. 108, “Part One: If A Chip Can Not Be Used, There Is A Package”.
However, with a conventional SIP, it is possible to house semiconductor chips made with varying processes in a single package so that reduction of the package area relative to the package substrate can be achieved. When a semiconductor device is configured by housing a plurality of semiconductor chips in one package in this manner, the yield of good units becomes an issue. That is, a wafer probe test is performed for each semiconductor chip in a wafer state, and only semiconductor chips that have been deemed good are mounted on a package substrate or the like.
However, there is the problem that when an assembly manufacturer who combines a plurality of semiconductor chips, for example, configures an SIP by performing wire bonding between the terminals (electrodes) of different semiconductor chips, the molding position of the terminals of both semiconductor chips, terminal pitch, signal line order, and the like need to be fixedly designed in advance, design freedom is reduced, and it is not possible to make good use of the characteristics of an SIP with which it is expected that development time can be shortened.
Also, a manufacturer who supplies semiconductor chips cannot perform all of the operation tests for semiconductor chips in a wafer state, e.g., reliability testing such as screening with high temperature continuous operation testing (burn-in) cannot be completely performed. Thus, semiconductor chips are individually judged to be good or not after being cut out from the wafer, and as a result, semiconductor chips for which KGD (Known-Good-Die: good chips that have been inspected) is guaranteed are obtained. However, in order to perform this sort of judgment for a chip in a state in which the chip has only been cut out from the wafer (a bare chip), an apparatus for electrically connecting to the terminals (electrodes) of each semiconductor chip or a special testing apparatus are individually necessary, and so there is the problem that cost increases.
Accordingly, it is an object of the present invention to provide a semiconductor package structure and packaging method in which, when combining a plurality of semiconductor chips, an electrical connection can easily be performed between the semiconductor chips without restricting the position, pitch, signal arrangement, and the like of external connection terminals for each semiconductor chip.
Also, it is another object of the present invention to provide a semiconductor package structure and packaging method in which a manufacturer who supplies semiconductor chips can easily guarantee KGD (Known-Good-Die) for semiconductor chips that configure an SIP, and in which an assembly manufacturer who fabricates SIPs can fabricate SIPs with a high yield of good units using KGD semiconductor chips.